1. Field of the Invention
Embodiments of the present invention relate to a liquid crystal display (LCD) device, and more particularly, to an LCD device that prevents a short-circuit that may occur between a common voltage transmission line and an inspection line when a sealant applies pressure against the inspection line through one or more separating layers. A short-circuit is avoided by removing or omitting a predetermined portion of common voltage transmission line in a region where the common voltage transmission line and the inspection line cross.
2. Discussion of the Related Art
Recently, various flat panel display devices have been developed, such as liquid crystal display devices (LCD), field emission displays (FED), plasma display panels (PDP), and light emitting displays (LED). Among the above-mentioned flat panel display devices, the LCD device is used most widely because of its advantageous properties, such as low power consumption, thin profile and lightness in weight. Such LCD devices provide a substitute for the cathode ray tube (CRT). In addition to mobile-type LCD devices associated with notebook-type computers, the LCD device has been developed for computer monitors and televisions to receive and display broadcast signals.
Despite various technical developments in the LCD technology, which may have application in different fields, research in enhancing the picture quality of the LCD device has been lacking compared to other features and advantages of the LCD device. In order to use the LCD device in various environments as a general purpose display, the key to developing the LCD device depends on whether the LCD device can display a high quality picture, while still maintaining a low weight, thin profile, and low power consumption.
The LCD device includes an LCD panel to display images, and a driving unit to apply a driving signal to the LCD panel, where the LCD panel includes lower and upper substrates, and a liquid crystal layer formed between the lower and upper substrates. The lower substrate (TFT array substrate) includes a plurality of gate lines arranged at fixed intervals in a first direction, a plurality of data lines arranged at fixed intervals in a second direction perpendicular to the first direction, and a plurality of pixel electrodes formed as a matrix configuration in respective pixel regions defined by the plurality of gate and data lines. Also included are a plurality of thin film transistors activated by signals provided by the gate lines (GL) so as to transmit signals outputted from the data lines (DL) to the respective pixel electrodes.
On the edge of the lower substrate, a common voltage transmission line is formed to transmit a common voltage, wherein the common voltage transmission line is electrically connected to a common electrode of upper substrate. The upper substrate (color filter substrate) includes a black matrix layer to prevent light from leaking to other portions except the pixel regions, and an R/G/B color filter layer provides the various colors. A common electrode is also provided.
The lower and upper substrates are maintained with a fixed gap therebetween by spacers, and the lower and upper substrates are bonded to each other. A liquid crystal layer is formed between the lower and upper substrates.
The pixel region includes a liquid crystal capacitor including a pixel electrode, the common electrode, and the liquid crystal layer disposed between the pixel electrode and the common electrode. In addition, an auxiliary capacitor is formed in the pixel region, wherein the auxiliary capacitor allows an electric charge to be maintained in the liquid crystal capacitor for one frame. The auxiliary capacitor includes an auxiliary line overlapped with a predetermined portion of pixel electrode. The auxiliary line is supplied with an auxiliary voltage from an auxiliary voltage transmission line.
Before bonding the lower and upper substrates to each other in the above-mentioned LCD device, it is necessary to inspect the lower substrate to detect short-circuits and open-circuits in the signal lines, namely, the gate lines, the data lines, and the auxiliary voltage transmission line. This inspection process uses a mass production system (MPS) inspection apparatus.
Disconnection or open-circuit inspection between the auxiliary voltage transmission line and the gate line is explained as follows: FIG. 1 is a cross sectional view illustrating the short-circuit inspection between the auxiliary voltage transmission line and the gate line.
As shown in FIG. 1, in order to apply a signal to an auxiliary voltage transmission line (not shown), the auxiliary voltage transmission line is connected to an inspection line 151 to supply an auxiliary voltage. The inspection line 151 is extended to an edge of the lower substrate 101, and is then connected to an In Line Process Test-Mass Production System (IPT-MPS) inspection apparatus. Also, the gate lines (not shown) are connected to the IPT-MPS inspection apparatus through an additional inspection line 151.
Through the IPT-MPS inspection apparatus, signals are supplied to the auxiliary voltage transmission line and gate line. A resistance is measured to determine whether the auxiliary voltage transmission line is disconnected from the gate line.
If there is no fault, the lower and upper substrates 101 and 102 are bonded to each other, and liquid crystal material is injected into a space between the lower and upper substrates 101 and 102, thereby completing the LCD device. After bonding the lower and upper substrates 101 and 102, the auxiliary voltage transmission line should not be in electrical communication with a common voltage transmission line 113, as explained below.
On or near the edge of lower substrate 101, there is a common voltage transmission line 113. To connect the inspection line 151 to the auxiliary voltage transmission line, the inspection line 151 necessarily crosses the common voltage transmission line 113.
The lower substrate 101 and the upper substrate 102 are bonded to each other by a sealant 160, wherein the sealant 160 is formed along the edges of lower substrate 101. The sealant 160 is positioned above the common voltage transmission line 113. Between the common voltage transmission line 113 and the sealant 160, there is a gate insulation layer 192, the inspection line 151 and a passivation layer 199, which are deposited sequentially.
The sealant 160 positioned between the lower substrate 101 and the upper substrate 102 is pressed down by a pressure generated when bonding the lower and upper substrates 101 and 102 to each other. Glass fibers in the sealant transmit the applied pressure to the passivation layer 199 and the inspection line 151. Accordingly, the gate insulation layer 192 positioned between the inspection line 151 and the common voltage transmission line 113 may be damaged due to the transmitted pressure.
Thus, the common voltage transmission line 113 may be exposed through the damaged portion of gate insulation layer 192, and may contact the inspection line 151. This causes a short circuit between the common voltage transmission line 113 and the inspection line 151. The inspection line 151 is, in turn, connected to the auxiliary voltage transmission line. Thus, the common voltage transmission line 113 is connected to the auxiliary voltage transmission line by the short circuit.